NRZ, PAM4 and the DSP: retimers, gearboxes, LPO, coherent
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Up to 25G per lane a transceiver moved bits by switching a laser on and off and reading the result with a comparator. Beyond that, the optics could not get faster cheaply, so the industry made each symbol carry more — PAM4 — and put a digital signal processor in the module to make a noisy four-level waveform readable. The DSP now dominates power, cost and latency of 400G+ modules, which is why the newest designs try to remove it again (LPO) or move it deeper (coherent). This page explains what the signal-processing chain does and what each variant means for hosts and diagnostics.
Modulation formats
| Format | Bits per symbol | Lane examples | Receiver needs | Penalty vs NRZ |
|---|---|---|---|---|
| NRZ (on/off, 2 levels) | 1 | 1G, 10G, 25G, 40G (4×10), 100G (4×25) | limiting amplifier + CDR | — |
| PAM4 (4 levels) | 2 | 50G, 100G, 200G per lane; 400G (8×50 or 4×100), 800G | linear front end, ADC, DSP equaliser; RS-FEC mandatory | ≈ 9.5 dB less eye opening → needs FEC and equalisation |
| Coherent (QPSK, 8QAM, 16QAM on two polarisations) | 4–8 per symbol | 100G–800G per wavelength (ZR, ZR+) | local-oscillator laser, 90° hybrid, balanced PDs, 4-channel ADC + heavy DSP + FEC | huge OSNR advantage over long spans |
PAM4 eye quality is measured as TDECQ (transmitter dispersion eye closure quaternary) rather than a simple mask — a DSP-derived figure of how much a reference equaliser must work to recover the levels. Standards and FEC pairing: FEC, AN & link training.
What the DSP does
host lanes ─► SerDes Rx ─► (retime) ─► gearbox ─► DAC ─► driver ─► laser/modulator
fibre ─► PD/TIA (linear) ─► ADC ─► CTLE/FFE/DFE equaliser ─► slicer ─► (FEC in coherent) ─► gearbox ─► SerDes Tx ─► host
| Function | Purpose | Notes |
|---|---|---|
| Retiming | clean clock on both sides — the CDR's job, absorbed into the DSP | CDR |
| Equalisation — CTLE, FFE, DFE, sometimes MLSE | undo bandwidth limits of laser, photodiode, fibre and PCB traces so four levels separate again | adaptive; converges in ms at link-up |
| Gearbox | change lane count: 8 × 50G PAM4 from the host ↔ 4 × 100G PAM4 to the optics (400G DR4/FR4); 4 × 25G NRZ ↔ 2 × 50G PAM4 (100G DR) | why a 400G module has 8 electrical and 4 optical lanes |
| Pre-distortion / driver shaping | compensate laser non-linearity so the four levels are evenly spaced | tuned per module at production |
| Monitoring | pre-FEC BER estimate, SNR, eye metrics — the source of CMIS VDM | VDM & FEC metrics |
| FEC (coherent only) | oFEC / CFEC inside the module; Ethernet modules leave RS-FEC to the host | 400ZR: CFEC; OpenZR+: oFEC |
Cost: a 400G DSP draws 3–6 W (half the module's budget), adds ~50–100 ns of latency and tens of dollars. It also fixes the module to the applications it was designed for — hence the CMIS application model (CMIS).
Retimed, linear, half-retimed
| Architecture | Module contains | Power (400G class) | Host requirement | Status |
|---|---|---|---|---|
| DSP / fully retimed | ADC, DSP, DAC on both directions | 8–12 W | any compliant host — the module presents a clean interface | mainstream 400G/800G |
| LPO — linear pluggable optics | driver + linear TIA only; no DSP, no CDR | 4–6 W | host SerDes must equalise the whole channel including the optics; needs a capable ASIC and tuning per link | AI/HPC short links; LPO MSA (2023+) |
| LRO / HALO — half-retimed | DSP on the Tx (host→optics) side only | 6–8 W | intermediate | emerging compromise |
| CPO — co-packaged optics | optics on the switch ASIC package; no pluggable | lowest per bit | new switch designs | early deployments |
For diagnostics the difference matters: an LPO module has no DSP to report pre-FEC BER or SNR, so the host's FEC counters are the only bit-level view, and link quality depends on the host's equaliser settings as much as on the optics.
Coherent modules in brief
A 400ZR/ZR+ QSFP-DD or OSFP contains a tunable laser (nano-ITLA) used both as transmitter source and as local oscillator, an IQ modulator (four Mach-Zehnder sections, silicon photonics or InP) driven by the DSP's DACs, an integrated coherent receiver (90° hybrid, balanced photodiodes, TIAs) and a DSP that does chromatic dispersion compensation, polarisation demux, carrier recovery and FEC — a former line-card transponder in 15–20 W. Their monitors (OSNR, CD, DGD, Q-factor, Rx signal power) appear in CMIS VDM (Coherent & long haul).
NRZ modules: the classic chain
On 1G–25G modules the chain is short — driver, laser, photodiode, TIA, limiting amplifier, optional CDR — and everything about it is analog. Rate flexibility comes from CDR bypass or rate-select bandwidth switching (Rate select); diagnostics are Rx power and the host's CRC/FEC counters; latency is a few nanoseconds. This simplicity is why 10G and 25G optics remain cheap and why they are still the bulk of what programmers see.
Host-facing consequences
| Topic | NRZ module | PAM4 DSP module | LPO |
|---|---|---|---|
| Link-up | immediate | DSP convergence + CMIS data-path init (hundreds of ms to seconds) | host equaliser training |
| FEC | optional/host | RS-FEC mandatory (host) | RS-FEC mandatory (host) |
| Breakout | by lane, if optics are parallel | only advertised applications | host-dependent |
| Power class | 1–3 | 4–7 (QSFP28 LR4) / CMIS 5–8 | CMIS 3–5 |
| Interop risk | low | host/module DSP settings, CMIS version | high — host tuning per module type |
Bring-up and failures: What the host does, CMIS issues, Speed & rate.
In CodingBox
The identity tells you which chain a module has: NRZ vs PAM4 encoding codes, CDR bits, CMIS applications with their host and media interface IDs, and the power class that betrays a DSP. For CMIS modules the DDM screen adds the DSP's own view — VDM pre-FEC BER and SNR per lane — next to the classic optical monitors.
The electrical side of LPO and DSP modules — C2M compliance points, OIF CEI-112G-Linear, who equalises what per generation: XGMII, XAUI and the AUI family.